Design And Implementation High Efficiency Step-Down Power Management Chip XD1129

With the rapid development of portable electronics products, the powermanagement chip market is becoming one of focus attention in electronics, and it alsosets a higher request to the power management chip, such as high efficiency, highreliability, low consumption, low cost etc. Based on the project “Design techniqueresearch of power analog intergrated circuit” in Key Lab of High-Speed Circuit Designand EMC, Ministry of Education in Xi dian University, the paper focuses on the designand implement of high efficiency synchronous rectified step down DC/DC powermanagement chip.A high efficiency synchronous rectified step down DC/DC converter is designedbased on detailed analyses the basic principles and control mode of the Buck DC/DCconverter. Using the peak current-PWM control mode, the transient response speed ofthe system has been increased, and the double poles of the output also have beeneliminated. An integration slope generation and summing circuit is proposed, and anovel current limit was also presented to eliminate the slope compensation effect onthe load ability. The system has zero current detection for the synchronous rectifyingtube with the technique of synchronous rectification is used, so that it can achieve ahigh efficiency. And the chip would automatically work in PWM mode or pulse skipmode,in the lighter load, the system would work in the pulse skip mode, the switchingtimes was reduced to decrease the lose of power tubes. In addition, the chip also hasthe integration of over temperature protection, under voltage lock out, sidestep softstart, over voltage protection and so on.Based on CMOS0.35μm processing，the whole chip design and simulation,layout design have been accomplished by using the software tools of Cadence.2.5V to5.5V input, the maximum2A load, the highest efficiency is up to93.7%and the chiphas been taped out.