Control Of Roads And Traffic Lights Control System Based On FPGA

With the continuing economic development of society and people’s livingstandards, along with the increase of the number of private cars, the wholecommunity has the growing demand for transportation. The city’s traffic problem hasdrawn increasing attention. The urban traffic jams have become the bottleneck ofrestricting city economic development. The traditional traffic control systems use thetiming control system, and this control method can not meet the requirement ofreal-time traffic conditions, so it often leads to a serious problem of one-way traffic,resulting in a single direction of too large traffic delays. The use of advanced trafficflow detection technology, advanced control strategies for high-tech development ofintelligent transportation systems can significantly improve the efficiency of roadtransportation, and the solution to congestion problems is one of the mosteconomical way.Aiming at the more and more frequent, more and more serious city trafficcongestion, this paper proposes a new method of traffic light control and FPGAimplementation for city crossroads. In order to solve the problem of crossroadstraffic resource wastage caused by the unbalanced traffic flow in all the lanes, theasynchronous traffic signal control method in opposite lanes is used in the designedintelligent traffic control system which is capable of reducing the traffic resource’swastage and improving vehicle’s operating efficiency of crossroads. The main workof this thesis is: design the overall framework of asynchronous intelligent trafficcontrol systems based on FPGA; use the hardware description language VHDL towrite the system control program; use the EDA software Quartus II to compile,synthesize, simulate, compare, analyze vehicle traffic efficiency of the intelligenttraffic control system and traditional traffic control system in a variety of trafficsituations; download compiled program to the FPGA（Field Programmable GateArray） control chip EP1C6Q240C8, connect peripheral circuits, and test theoperating status of the control chip.