Mechanical Parking System Control Core Research

In recent years, due to the development of national economy and the improvement of people’s living standard, there is a large increase in the number of cars,the contradiction between limited city land supply and a large number of car parking space needs have become increasing apparent. Compared to common garage, mechanical parking system can save floor space, make the loading and unloading management convenient and have flexible configuration and other characteristics. The use of mechanical parking system is the direction of development and important way to solve the problems in parking at present. PLC (Programmable Logic Controller) is still adopted as control core to design mechanical parking system at home and abroad. Although PLC has a high reliability, strong anti-jamming, easy learning and usage and other advantages, the shortcomings is PLC control system of the large size, high cost, which have hindered the progress of technology of mechanical parking system. That higher speed, the more strong performance and higher level of integration chip are used will be the inevitable trend of the development of mechanical parking system.In this article, it is proposed based on FPGA (Field Programmable Gate Arry) and single-chip microcomputer as control core design way in view of the small community use mechanical parking system. This design is divided into two parts, three-phase ac inverter circuit system and systems use record store circuit.1. Three-phase AC inverter circuit section:The inverter circuit structure is analyzed to determine the choice of the type of inverter circuit and control signals are implemented according to the needs of the system. Specific work:1) Complete the three-phase half-bridge inverter circuit design. Using OrCAD software for circuit simulation, verify the rationality of the design of the circuit.2) Complete the development of FPGA-based three-phase SPWM control signals. First analysis of the overall structure of the module, and then the module is divided into the modulation wave generator module, triangular carrier module, module, and the dead zone modules. First analysis of the overall structure of the module, and then the module is divided into the modulation wave generator module, the module of the triangular carrier, the comparator module and the dead-band module, compiled separately for each module and simulation. The top module is instantiated by the various sub-modules, and the diagram of RTL is compiled by the top-level module. In order to validate the resulting signal meets the requirements of the three-phase SPWM signal, the use of logical analysis SignalTapIl signals are analyzed.2. Records storage systems: First the task is to complete the hardware design of the storage system, Cygnal C8051F020chip as the main chip to configure the SD card (Secure Digital Memory Card), according to the storage system to the user information acquisition and storage functions. Then the task is a system programming, the difficulty is based on the SD card, FAT32(File Allocation Table32) file system operation. Finally, in order to verify the design of the hardware and software, the program is downloaded.