The Design And Test Of Embedded Compatible Beidu/GPS Reciver Based On FPGA And DSP

At present, the GNSS satellite navigation and positioning technology is rapidlydeveloping, being applied broadly in mapping, navigation, astronomy and communication,many countries are actively developing and applying GNSS receiver. Some overseascompanies and research institutes have been equipped with mature GNSS receiverdevelopment technology, however, most of our country’s application of GNSS still rely onforeign countries’ OEM products. Coming across the deployment of the construction ofBeidou satellite navigation system, in order to realize the innovation and of the navigationreceiver and support the Beidou satellite navigation system, it is inevitable to develop theindependent innovative and high-performance GNSS receiver which is suitable to theBeidou satellite navigation system and compatible with other navigation system.This thesis is unfolded against the background of the research and design of GNSS.Based on the whole master of the receiver design, it realizes the Beidou/GPS bimodalreceiver design in view of the live FPGA and DSP, it chooses the TMSC6747as theplatform for systematic exploitation with the high speed parallel FPGA as the baseband looppartial management. Through the improved design of the baseband loop, choosing the mostpopular two multiplication algorithm of Navigation algorithms, improving the function ofcapture, monitor and navigating. After the design of baseband loop, we have the test of RF,baseband loop and action, static state, temperature, and impact resistance tests, and at last aconclusion will be drawn through the analysis and compassion of the data, which hasapproved that our receiver has meet the need of commercial function, consisting theproperties of smaller size, high accuracy, better motivity, anti-high temperature andanti-shock.This thesis mainly includes the following contents:1. To study the fundamental principle of GNSS satellite navigation, positioning, andthe decoding process of positioning. Based on the systems designed in this task, theappropriate navigation algorithms will be chosen. What is more, the capture and trackingloop of the receiver will also be studied and improved.2. By studying the integral structure of Beidou/GPS bimodal receiver, the thesis aimsto master the functions and implementation methods of each module, the basic method ofembedded system exploiting. What is more, based on performance requirements for DSPchip, the appropriate chip will be chosen out and the transplanting of Receiver’s baseband parts will be simultaneously performed3. To set up an embedded system platform for on one kind of development board whichis based on DSP, and the platform includes the establishment of hardware debuggingplatform (hardware includes microprocessor, peripheral circuit, memorizer and RS232serialport).4. Except for the hardware design, the system software design is also performed,including the exploitation of DSP application software, multitask design on the basis ofDSP/BIOS, design of GISP and so on. Meanwhile, the design is also checked in the aboveplatform.5. To test the RF front-end and baseband loop of the design system respectively, andthe test on the whole system will also be unfolded, such as action, static state, temperature,and impact resistance tests, and at last a conclusion will be drawn through the analysis andcompassion of the dataBased on the instantaneity, high efficiency and reliability of the receiver system, thispaper proposes and finishes the design of compatible-type receiver, hoping to provide astudy method and realization process for the later Beidou/GPS bimodal receiver study.