Design And Implementation Of Continuous Phase Modulation And Demodulation

Today's society, digital communication has gradually replaced the analog communication, as the main form of communication. In digital communications technology, digital modulation and demodulation technique occupies a very important position and plays a key role. Continuous Phase Modulation is a digital modulation in the application of wireless mobile communications. By two significant advantages which are its constant or small ups and downs envelope and minimal power spectrum, it arises from a wide range of attention. It is consistent with today's modern communications technology development status and research directions, with strong research value. This paper studies the design and implementation of continuous phase modulation and demodulation in iterative system.This paper first analyzes the analytic mathematics and spectral characteristics of CPM signals, on this basis, gives the decomposition of CPM signal model, besides researchs the principle of CPM signal demodulation and SISO model based on Log-MAP algorithm in iterative system. Then for the design requirements, models and simulates the continuous phase modulation and demodulation, through simulation and analysis BER performance and power spectral density of CPM signal by choosing different combinations of parameters on the system to determine the parameters of each module.Finally, according to the algorithm model of the system, considering the hardware complexity, real-time and other indicators, proposes the hardware design and implementation scheme based on LDPC-CPM. Core processor of the system choses TI's latest chip floating-point DSP TMS320C6747. In order to improve the real-time of system, the system selects Altera's FPGA chip EP3C25E144 to control the ADC, DAC chip for data acquisition, conversion and pretreatment. Between the FPGA and DSP data transmission using EMIF (External Memory Interface, external memory expansion bus), DSP reads and outputs datas by DMA (Direct Memory Access, Direct Memory Access), you need not take up CPU resources to complete the data transmission. System performance test shows that the system met the performance requirements of paper targets.