Design Of The Key Modules In Wireless Spread Spectrum Receiver System With IP Core

Nowadays, Software Radio(SR) has been becoming a hot research in the field of Wireless Communications, especially in the intermediate frequency digitization receive. The core thought of SR is making the high-speed broadband A/D and D/A as close as possible to the antenna, and more function of wireless are implemented by using software. With the development of semiconductor technology, the method of IP core is very popular in designers. It simplifies the design of projects, reduces the development cycle, raises the work efficiency.This thesis is a sub-project of a wireless communication system. Based on the project requirements, a Direct Spread Spectrum CDMA system is designed to solve these problems in the project, such as: path loss, multi-path fading, electrical line noise, doppler frequency shift in the bad channel environment. With the SR technology, the engineers could accomplish the function of the Digital Down Converter(DDC) and spread spectrum despread by using software in FPGA devices. The task of this paper implements the Cascaded Integrator Comb(CIC) decimation filter, Root Raised Cosine(RRC) filter in DDC and PN code synchronization with IP core.In this thesis, the advantages and disadvantages of the three spread spectrum: Direct Spread, Frequency Hopping and Time Hopping have been compared. This paper researches the theories including direct spread spectrum, PN code acquisition and tracking, and analyzes the principles and characteristics of CIC decimation filter and RRC filter. In electronic design software Quartus II, the key modules of the direct spread spectrum system including CIC decimation filter, 17 orders RRC filter, 8 passageways parallel PN acquisition, the delay lock loop PN tracking are designed by using VHDL. Finally the functions of each module have confirmed in FPGA devices.