Design And Implementation Of FFT Processor And Communication Protocol For Power Harmonic Detection

With the growing of the power system scale and the increase of nonlinear load, "harmonic pollution" is becoming worse. Based on various hazards caused by the "harmonic pollution", harmonics real-time detection in electrical power system is very important. Understanding of harmonics in exact situation is meaningful to prevent harmonic hazards and maintain grid security.At first, background and current research of power harmonics detection is introduced. On this basis, harmonic analysis theory based on Fourier transform is introduced for further information. Combined with the power industry standard DLT-1028-2006 and the specific application context, a solution algorithm to power harmonic detection is proposed. On this basis, by the design goal of minimizing resource, the parameter of FFT processor is determined. Then a hardware and software platform of power harmonic detection is designed to verify the FFT processor. The results show that the processor takes 18.432 ms to complete an FFT operation at the frequency of 10MHz, when the harmonic value is 10% of fundamental and there is no frequency offset, measurement error of harmonics is less than 0.2%, which meets the power harmonic analysis requirements well. The logical resources of the processor include 598 slices, which is 57% less than XILINX FFT IP of the same condition.Finally, the advanced DLMS/COSEM communication protocol is introduced from physical layer, data link layer and application layer. Then a DLMS/COSEM communication protocol software and hardware platform is designed for the specific application of power harmonic data communications. The results show that the platform is well designed to complete the communications of power harmonic data.