The Research On High Frequency UPS Based On Parallel Interleaved Technique

Multiple UPS, which can satisfy the high requirement such as high capacity, great reliability, and strong fault-tolerance for grid supply system, is more and more used in many industrial fields. High frequency multiple UPS is popularized for its good input characteristic, high power density, low cost and so on. In this paper, high frequency multiple UPS based on parallel interleaved technique is taken as the research object. The characteristic of the voltage, input and output current ripple, circumfluence in parallel interleaved system is detailed analyzed. In addition, the principle of the parallel interleaved modulation is introduced and is realized by CPLD.First, the voltage characteristic based on the parallel interleaved SPWM modulation is analyzed by Dual Fourier Transform and Bessel Function. According to the analysis, the harmonic frequency of the output voltage by parallel interleaved SPWM modulation is in complete accord with the one by unique modulation. So high quality output voltage can be realized in low switching frequency.Second, it is focused on the analysis of the input and output ripple current in the manner of parallel interleaved SPWM modulation. The size of the input and output filter inductor in UPS can be reduced when using parallel interleaved modulation compared with the union in three-phase three-leg converter. The results of simulation and experiment are given to verify the theory analysis.Third, the cause of circumfluence in the UPS controlled by the parallel interleaved technique is illustrated in this paper. Two methods suppressing the circumfluence is proposed based on the equivalent circuit of three phase zero sequence circumfluence. And then simulations verified the proposed method feasible.Last, the paper introduced the procedural implementation method of the parallel interleaved modulation using federal control between CPLD and DSP. Program is wrote by Verilog language. Taking proper measure to allocate the resources and missions between DSP and CPLD, makes the whole system realize superior performance with least hardware of the DSP.