Design And Implementation Of FPGA And ARM Based GPS Signal Processing Platform

In the field of navigation and positioning,Global Positioning System (GPS) is playing a significantly important role now. With the rapid development of telecommunication industries, GPS receiver which processes and receives GPS satellite signals,is undergoing a high-speed evolution. GPS receiver is getting more and more attentions from many companies and research institute due to its flexibility, upgradeability and modularity.The main work of this study is to design and implement hardware platform, and the real-time GPS signal processing system based on FPGA development board and ARM microprocessor. This receiver could realize mixing, integration and dumping of GPS signal, base-band processing of digital signal, correctly decoding navigation message, positioning of satellites and user, and displaying the result in real time. Through dealing with several sets of real signals, it shows that the basic functions of a GPS receiver could be realized by this model.Firstly, the GPS system architecture and signal structure are described and Matlab is adopted to realize the signal processing algorithm for feasibility verification. System architecture has been built up with SystemC/TLM to help analyze the possible hardware and software modules partition. The hardware modules are then gradually refined to register transfer level (RTL). The 12-channel digital correlator is implemented in FPGA and realized by Verilog programming. The software of GPS signals real-time control and base-band processing is realized by C programming based on ARM microprocessor. The serial/Ethernet communication and dynamic display are realized by PC control software based on MFC. Therefore, the whole platform could realize coarse acquisition, tracking of code phase and frequency, navigation message decoding and positioning of the user..The paper focuses on the design of the 12-channel digital correlator and baseband processing loop. Some detailed design and function test results are described and the real-time running results are illustrated and analyzed.