Based On Fpga Design And Implementation Of The Host Of The Xts-aes Encryption Card

With the development of storage technology and network technique, storage security is getting more and more concerns. Since data is the core of the whole storage system, how to protect data has become the key point. IEEE Computer Security Committee has proposed XTS-AES algorithm based P1619 protocol. This thesis designs a hardware encryption card by applying P169 protocol.This paper introduces tweakable block cipher technology and analyses three construction schemes of tweakable block cipher, and describes XTS-AES algorithm which based on XEX construction scheme in details.This paper designs an encryption card based on PCIE. First, this paper complete the whole FPGA design, which includes two parts: interactive part and encryption/decryption processing part. The fisrt part implements the interactive job between host and the card through PCIE in DMA translate mode, putting data into RAM and FIFO; the later one deals with the implement of the XTS-AES algorithm. Secondly, this paper implys AES algorithm on FPGA through a new pipeline way, takes electronic code book (ECB) mode, completes 15 rounds data transformations by using two-stage pipeline. At last, after a functional simulation under modelsim, this card is implemented based on ML555 eavlution platform, and compares the data captured and the data based on P1619, then verifies the feasibility and correctness of the design. Unlikely traditional encryption device, this encryption card is designed specialy for store sysytem based on P1619.