Parallel Ethernet-based Embedded System Design

According to the development of technology, in the electronic information field, the performance of many embedded system must be improved increasingly to satisfy the real-time requirement of data processing. In the application of abundant data processing, the computing speed of DSP and MCU is strictly required. In this situation, computation with single DSP often can't satisfy the real-time requirement of the system. So engineers developed the parallel computing system with multi-DSP, which was successful.But now many of the multi-DSP parallel computing system adopt the mode of memory-shared and bus-shared to schedule and communicate. With this reason, designer must put DSPs in a single circuit, which is hart to develop and debug. Designer must redesign the hardware and the software when the system needs to be upgraded. Based on the above reasons, it is very hart to design either hardware or software of this kind of DSP computing system, and also the system has other faults: long cycle of development and upgrade, high cost.In this paper, we designed a kind of DSP parallel computing system based on Ethernet which takes ADI's ADSP BF548 as core. Several DSP boards play the roles of computing units and scheduling unit respectively and uC/OS-II real-time operating system was transplanted to the BF548 also. We construct a 100M Ethernet with DSPs and a switch. A suite of flexible and extendable DSP parallel computing system was developed base on an optimal Ethernet. In the last of the paper, we provided the experiment data and parsed performance. As a result, the system we designed was proved to be a valuable computing system.