High-speed Signal Processing Platform For Radio Monitoring Design

The basic task of radio monitor is to search the intercepted signals from the reconnaissance system, then analyze the signals to obtain the specific parameters, and complete the tasks of modulation recognition and demodulation at last on this basis. But the intercepted signals are usually in passive states, with broad bandwidth, multiple modulation modes and signal components. The communication reconnaissance system often uses broadband receiver, with high-speed sampling rate to adapt to different bit-rate and modulation mode; then more complex signal processing methods are implemented in demodulation. Therefore, the signal processing systems used for communication signal reconnaissance not only have to meet the requirement of massive computation, but also require parallel processing capability to ensure the reconnaissance system's real-time performance.Based on the analysis of high speed digital signal processing technology in the field of radio monitor, this thesis design a high speed digital signal processing board for the task of radio monitor in cooperation with others.This board has an efficient baseband signal processing module for using high performance parallel DSP processors and large capacitance FPGA, which also has an high speed AD interface, a large capacitance data memory module and a high-speed data transmission module. The board chooses four ADSP TS201S (TigerSHARC), one kind of the most powerful floating-point DSP processors, as its core signal processing module, between which the interconnect communication is implemented both through external port and link ports. In this thesis, the entire hardware design of the high speed digital signal processing board and the most important sub-modules is realized. The results of the test on various modules show that the system satisfis the needs of the subject, and it can be used in the field of radio monitor. This thesis also implements the DDC algorithm on FPGA, and proposes a new method of the implementation of algorithm on the FPGA.The main contents of the thesis are presented as follows:1.The key digital signal processing technologies used for radio monitor are studied, and consider with the characteristic of high speed digital signal processing technology, the scheme of the high speed digital signal processing board is designed in cooperation with others.2.The design of pivotal sub-modules are achieved independently, including high speed digital interface and data format transformation module, shared bus DMA module, the linkport interface module with DSP and FPGA, usb controller , firmware and the driver for the USB, and also the code for after-processing with Matlab.3.The hardware debugging and test is implemented in the end of hardware design, and the performance of the design meets with the need of the system.4.In the process of debugging, this thesis gives an improvement scheme including AD6654 for the specific projects, which has a hign speed ADC and six parallel DDC channels.5.The DDC algorithms are discussed, and these algorithms are implemented on FPGA. A new method of the implementation of algorithm on the FPGA with the software named System Generator for DSP is proposed. This software improves the efficiency of the design.