Design And Implementation Of Soc Bus Test Platform

SoC(System on Chip) design technique can reduce the developing cost of thewhole system significantly, and promote the performance of productions. Thistechnique has been the mainstream design methods of embedded systems. As thecomplexity of integrated circuit increasing, the necessity of verification in Socdevelopments is increasing. According to that, in this paper a test platform isconstructed, which based on logical emulation and dynamic verification technique.The platform can execute system test and performance evaluation of different SoCbuses, and can be utilized to emulate the IP core of SoC bus interface.In this paper, the rationale of two SoC bus- AMBA-and Wishbone which are usedwidely is expounded. The transfer type and interconnection of the two bues areanalysed. Then, the characteristics of mainstream SoC bus is concluded. Based on thecharacteristics of SoC bus, in the paper an entire solution of the test platform isproposesed. The analysis of solution characteristics has been given. By introducingthe concept of transaction into validation process, a test method based on transactionis put forward, which steps up the pin-level to a certain higher abstract level, reducethe complexity of test. By building a transaction library, transaction managementaccording to layers is implemented, and the API is also provided. Through the API,the users can add transaction concerning different applications into the transactionlibrary. In order to enable the test function which support the platform to test aserires of SoC bus and improve the reusable characteristics of test platform, the bustask and bus function model are designed and implemented. Through analyzing thetest elements of AMBA bus, the transaction functions, the test file structer and PLIinterface for testing are provided. The test for AMBA bus has been realized.According to the analysis of the test results, the rationality and correctness of SoC bustest platform have been validated.