Burst Direct Sequence Spread Spectrum Signal Synchronization Algorithm Realization

Compared with conventional communication technologies, spread spectrum technology has advantages of low interception rate, strong anti-jamming ability, hiding the useful information and multiple-access communication ability. It has been used widely in military and mobile communication. In spread spectrum communication system, the most ordinary and the easiest achieved system is Direct Sequence Spread Spectrum system (DSSS). The signal synchronization algorithm this paper studied is one of the core technologies in DSSS system. At present, there are many signal synchronization algorithms at home and abroad on continuous or long-term signal, but for burst and short-term signal there are few synchronization algorithms. The signal synchronization algorithm in this paper is aimed at short-term burst signal in DSSS System.This paper is based upon the project Digital Correlator. After an in-depth study of the rationale and technologies used by home and abroad of mainstream signal synchronization algorithms, as well as the advantages of software radio concept , the characteristics of FPGA and the possible application field, this paper brings out one synchronization algorithm for large Signal-to-Noise Ratio (SNR) without knowing spread spectrum code and another synchronization algorithm for low SNR, short-term burst signal of DSSS system, which spread spectrum code is known.After having a detailed analysis of the characters of the large SNR(signal to noise power ratio), whose spread spectrum code is unknown. And also a deeply analysis of the software synchronization demodulation algorithm the copartner has, as well as the initial hardware implement, the author summarized an algorithm. The synchronization algorithm is first blind demodulation (demodulation without knowing spread spectrum code) then synchronization. Using pulse magnitude correlation, pulse header correlation and stone tone interface elimination indicator signals to acquire the coarse synchronization, and then uses interpose method to acquire extractive synchronization. To the low SNR, large frequency shift and big power range short-term burst signal, after having a detailed study of the fast acquire algorithm and the method to define the threshold, the author bring out a synchronization algorithm based on taking the ratio of the signal power spectrum density's maximum value and the second maximum as the threshold. The synchronization acquire process is finished when the output exceeds the threshold.Both algorithms have been verified by matlab simulation, which can meet the need of the user. The large SNR, with no spread spectrum codes information signal's synchronization algorithm has been implement by Verilog HDL and verified on FPGA.. When testing the hardware with software, the author added a buffer module (FIFO) to solve the problem of the hardware causing computer crash, which ensures a stable work of the hardware.This article is the summary of the author's main job. It sums up the good coding criterion in FPGA design and discusses the direction of future work to improve based on theory analysis and simulation results.