| Cache is a solution to the bottleneck between the CPU and the main memory since 1970s. However, the bottleneck becomes more and more serious because of the increasing requirement of the software and the hardware. So, how to redesign the cache structure and improve the hit rate is one of focuses on computer research.First, the paper gives some basic concepts about cache. Then it extensively introduces the recent achievements on the cache coherence protocol and the cache structure. Many kinds of parallel storage schemes-XOR (exclusive OR) schemes, are analyzed in detail sequentially. It is found that XOR schemes will waste no memory and be easily implemented. Especially, EE, MG and EE-MG schemes can access simultaneously to many frequently used data patterns without any conflicts.At the same time, the paper studies intensively if there exists a way to improve the cache hit rate of the general purpose machine. A new cache mapping technology is discussed here. It uses the EE, MG and EE-MG schemes to realize the address translation. According to this technology, a kind of data blocking method is proposed. The data blocking method includes two aspects: one is that vector data are divided into several blocks and stored one block after another, so it can makes full use of the characteristics of EE,... |
