| Upon the prophase work of our staff room, we have accomplished the system of QPSK modulation and demodulation on the whole. We want to implement wireless transmission of RS-232C asynchronous serial data through QPSK modulator and demodulator. After an thorough study the related knowledge of RS-232C, MPEG-2 and DVB-S, to aim at the characteristic of this application, decided to redefining the content of some bytes in the MPEG-2 frame, and delete some content that not necessary. So as to reduce the system difficulty and achieve high efficiency at the same time. One of the hard problem in the system design is to solve the problem of interface between asynchronous data and synchronous data; In addition, the other is the interface of different rates. Therefor, introduce a 'digital sampling'method in this paper, using analog sampling for reference. The use of this method allows the two key problems to be solved successfully. After compare and selection, finally decided to use FPGA from Xilinx Company, to achieve this translation, and implement the MPEG-2 pack/unpack of RS-232C asynchronous serial data, as well as RS encoding/decoding. The system can work successful after software designing, simulating, debugging, validating and downloading. By adjusting the rate of PC COM port as 19.2kbps,9.6kbps,4.8kbps,2.4kbps and etc, during a long-time observation, it's proved to be true that this design has achieved the goal of implementing wireless transmission at variable-bit-rate, the result is satisfying. It owes to format data into MPEG-2 frame, enables the adoption of a serial of maturity FEC technology which have being used in DVB-S, such as RS, convolutional encode, Viterbi decode, QPSK modulation and... |
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