Simulation And Development Of 14/16 Nm ETSOI Device

For technology nodes of 22 nm and beyond, fully depleted(FD)extremely thin silicon on insulator(ETSOI) planar architecture is one of the promising candidates.However, the extremely thin film poses challenges for the implanted doping process,as high energy implanted ions in MBPP have a high probability to create damage in the extremely thin silicon which in turn dramatically degrades the performance. To avoid the damage, an implant-free process which impurity and stressor are incorporated in source/drain(S/D) by in-situ doping and improved implanted doping process had been devised.It is shown that the performance of our actual devices with improved implanted doping is superior to devices with implant-free process. There are different doping profiles between implanted doping devices and in-situ doping devices through TCAD simulation. Light doping regions(LDR) are appeared in source and drain near to the gate for implanted doping devices, but heavily doping regions are located in all source and drain for in-situ doping device. Because of the high resistance of LDR, the influence of drain potential on carries in the channel is prohibited, which shrinks the short channel effect of implanted doping devices. Less dopants in channel for implanted doping devices make Vt more stable. The region occupied by epitaxy SiGe under the spacer 1 due to the excessive corrosion during the epitaxy preclean enlarges the Cox, so smaller SS can be achieved.It is also shown that the performance of only extension implanted doping devices is identical to that of implanted doping devices. Dopants can arrive in substrate for implanted doping devices with 30 nm BOX, but it is reverse for only extension implanted doping devices with 30 nm BOX. In addition, the simulations of only extension implanted doping devices with 30 nm BOX, 7 nm and 10 nm gate length(Lg) under the reverse back bias are performed. Simulated outcomes indicate that the performance of PMOSFET with 7 nm, 10 nm Lg and 7 nm SOI is optimistic at the reverse back bias. But only for NMOSFET devices with 10 nm Lg and 7 nm SOI, theperformance is available at the reverse back bias.