Research On Automatic Generation Of AADL Model Code Based On ARINC653 Platform

The development of avionics system architecture has experienced vertical, hybrid, joint type and gradually evolved into a modern architecture of integrated modular avionics. This structure can separate the upper application from the system nucleus, so that multiple functions can run on one platform and reuse all kinds of computer resources effectively. ARINC set ARINC653 standard for the architecture of integrated modular avionics, which makes the distinctions to space and time, solves the problem of protecting security of sharing computer resources in real-time systems, and offers the interface specification of integrated modular avionics application software standard. ARINC653 standard brings opportunity and challenge to software development of avionics system. The method of traditional code writing is hard to meet the complexity requirements of ARINC653 standards and has the disadvantages of long development cycleand bit error rate. In light of the above problems, this paper puts forward a code generation method of ARINC653 platform based on AADL (Analysis and Design Language Architecture), which comes about under the influence of the model driving thinking.AADL is currently in the field of embedded system an important architecture design and analysis language, which can support the top-down refinement software design method. This paper firstly analyses the ARINC653 standard architecture and proposes the idea of code generation in accordance with the hierarchical structure. Then, it presents the main process of code generation and pay more attention to mapping rules. Finally, the design and implementation of code generator are put forward. The following are the major contributions of this thesis:(1)This thesis puts forward the strategy of generating codes according to the structure of task layers, zoning layers and core layers. The task layer generates and runs the C language code on each partition. The zoning layer generates configuration code generation communication. The core layer generates configuration code for the zoning layer of memory, scheduling, partition communication.(2) The mapping rules from AADL model based on ARINC653 to code programming model are put forward in this thesis. Mapping rules will be described according to three levels:the task layer mapping rules, partitioning rules and kernel layer mapping layer mapping rules. In the task layer mapping rules introduced process component, threaded components, sub-function components, data components and attachment behavior semantic mapping rules. Partition layer mapping rule describes intra-partition mapping rules for four communication mechanism. Kernel layermappingrules introduced scheduling model, partition memory model, inter-partition communication model to configuration code mapping rules.(3) On the premise of code-generating strategy and mapping rules, code generator is designed, and every module is designed and realized.