Phase Capacitance Of The III-V MOSFET And Schottky Contact Characteristics

With the development of semiconductor industry, it is necessary to have new materials and devices because the scaling down of Si-based MOS devices has encountered a lot of difficulties. The manufacturing process is also faced with many challenges. For instance, the introduction of Ⅲ-Ⅴ semiconductor, high-κ/metal gate, and Schottky source/drain enable the feature size of devices continue to downscale according to the Moor’s law. This thesis extends the calculation of the voltage-capacitance characteristics of Si MOSFETs to that of GaAs, InAs, and InGaAs MOSFETs. The voltage-capacitance and the Schottky contact of GaAs MOS devices are also investigated experimentally.In the first chapter, the background and significance of this work are briefly presented. In the second chapter, we give some basics of MOSFETs, including voltage-capacitance characteristics, quantum effects, and Schottky contact characteristics. In the third chapter, we first present the method of calculating the voltage-capacitance characteristics of Ⅲ-Ⅴ MOSFETs. Then we present the calculation proceduces and program. Finally we compare the results of Ⅲ-Ⅴ MOSFETs with those of Si-based MOSFETs. In the forth chapter, after introduce the process flow of GaAs MOS capacitors, we give the method to improve the surface of GaAs semiconductors. In this charpter, we also present the study of the characteristics of the Schottky contacts on GaAs semiconductors.The main results of the thesis are:(1) We find that the influence of quantum effects is more important in Ⅲ-Ⅴ MOSFETs, and their inversion capacitance Cinv is less than Si-based MOSFETs. (2) We fabricate GaAs MOS capacitors with good surface quality with LaAlO3 dielectric. They have a EOT of 3nm with a leakage current of 7.5×10-3 A/cm2 at (Vfb-1.0) V. We find that a 0.5nm SiO2 is effective to improve the surface quality of GaAs semiconductor. (3) We fabricate the Yb/p-GaAs Schottky contacts with good characteristic for application of GaAs Schottky source/drain contact. It has a barrier of 0.82eV for holes and a forward/reverse current ratio of 106. The results of this thesis provide new information for deep understanding and application of Ⅲ-Ⅴ MOS devices.