Study And Implementation Of A Simulation System For Communication Scheduling On Networks On Chips

Current Systems-On-Chip (SoC) execute applications that demand extensive parallel processing; thus, the amount of processors, memories and application-specific signal pro-cessing cores is rapidly increasing. In these new Multi-Processor SoCs, (MPSoCs) one of the most critical elements regarding overall efficiency is on-chip interconnections.Network-on-Chip (NoC) is an efficient solution for the communication on large-scale multiprocessor System-on-Chip. Compared with Bus-based communication, NoC-based communication uses network interconnections, and effectively reduces power consumptions, mitigates bandwidth contentions, improves the reliability, simplifies the hardware architecture and has good scalability. Wormhole Switching is a popular communication mechanism for NoC. Compared with the Store-and-Forward mechanism, Wormhole Switching has less cache requirements; therefore it is very suitable for NoC, which is strictly limited by the cost, power consumption, size and other aspects. The work in this thesis mainly focuses on the real time communication scheduling on Wormhole Switching NoCs. A simulator for real-time communication scheduling on Wormhole Switching NoCs is designed to support the research of communication scheduling.Some algorithms about the real-time communication scheduling on NoC were studied in our work, and a simulator about the real-time communication scheduling on NoC is designed for facility the research. The simulator can help the researcher to evaluate the real-time performance of various task sets (e.g. periodic task set, non-periodic task set, etc) simulated by it with different scheduling algorithms (e.g. RM, EDF, LLF, etc).The research includes two different parts:the first part is about the scheduling algorithms applied to NoC-based communication, and three scheduling algorithms are analyzed in detail; the second part is about the design and implementation of the user interfaces of the simulator.This thesis detailed the design and implementation of three scheduling algorithms for NoC and the functional modules required by the simulator. By using this simulator, performance of three scheduling algorithm was analyzed.