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Design And Evaluation Of High Reliability Dual Redundant On-board Computer System

Posted on:2011-12-19Degree:MasterType:Thesis
Country:ChinaCandidate:W T JiaFull Text:PDF
GTID:2198330338490112Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
As the center of satellite application process and control, the reliability and performance of On-Board Computer directly decides the ability of satellite application process. With the rapid development of technology, the reliability and performance of OBC is becoming more and more important and essential. It's both necessary and challenging to develop an OBC system with high reliability and high performance.Dual redundant technique is a powerfull fault-tolerant technique commonly used by current OBC systems, especially the hot-redundant technique. the paper presents a new redundant approach with different operation modes. Compared with typical redundant approaches, there are several features of the approach presented in the paper. First, the operation modes of dual system are different. The master computer focuses on satellite applications, while slave computer focuses on system reliability. Second, the slave computer detects faults to avoid the output difference caused by faults of the slave computer. Third, if the output is different, the approach will determine whether the type of the fault is instantaneous or permanent. If the fault type is instantaneous, it just needs system recovery. Fourth, hardware watch dog detects the control flow of OBC applications, therefore, the results and control flow of OBC programs are monitored.The paper designs and implements a prototype redundant system. The satellite applications of the dual redundant prototype system are always correct and reliable.To accurately evaluate the fault-tolerant effectiveness of the dual redundant OBC systems, the paper conducts the hardware fault injection experiment. Based on the fault propagation process and SEU effect of dual redundant OBC system, the experiment injects faults that are close to real faults. The SRAM with EDAC technology and the Flash with TMR technology are implemented to the experiment. The paper analyzes the experimental result and evaluates the fault-tolerant effectiveness in EDAC, TMR and dual redundant techniques. The experimental result indicates that dual redundant systems own more power in fault tolerance. With the help of dual redundant system, the reliability and performance of OBC system can significantly increase.
Keywords/Search Tags:Dual redundant technique, on-board computer, hardware fault-tolerant design, fault injection technique
PDF Full Text Request
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