Vrla Battery Charging Chip Research And Design

With the rapid growth in the communication area, DPR (Discreet Power Array) has more and more applied to the t communication erminal devices. At the same time, the portable product market is growing rapidly. All this has put great demands for power supply having more efficiency, higher power density, less space, high reliablity and less cost.. As an available and convenient solution, the development of the secondary battery that can be charged repeatedly satisfied the demands of communication market and advanced its growth.Because of its long usage life, convenient maintenance features, quite high quality and low cost, VRLA batteries attracted more attentions in different secondary batteries and has had great potentials in future marketing. Besides the communication area, it can wider applied to other applications like in the Electrical vehicles. The wide applications of secondary batteries greatly advanced the research and development of the charging technology as well as the charging control Integrated Circuits. Charging control ICs should control the charging circuitry to complete the charging properly and make it quickly, accurately and safely. It also must ensure that the chargers work properly in different conditions. So it is inevitable to put more efforts into the research on charging technology. Recently, it has been a focus in the power technologies. However , the charging control chips have been monopolized by foreign companies for long. It is significant tour country to develop the charger ICs with own property rights.In this thesis, the technology of secondary batteries and power management ICs was introduced firstly .Then a design of Valve Regulared Leid Acid (VRLA) CHARGE IC was proposed. Begin from analysis of the charger IC and control methods, the inner modules of the IC were ectrcted. And design of all these modules was successfully fulfilled seriatim These modules can be reused in power management ICs as well as the power modules' in SoC. The inner circuits and applied circuits were optimized. By outer circuit modeling it is achieved to reduce amount of calculation in system simulation and thus the design period of the chip. It is possible to use the methodology to system simulation of other power management ICs to improve its system design.. And it is one of highlight in this thesis. The chip is designed in 1.5um BCD process, and simulated by Spectre S. Thesimulation results showed that all specifications.expected were achieved. The chip will be taped out soon and some obvious advantages could be expected.