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Based On The Dsp Fault Recorder Design And Fault Ranging Method

Posted on:2005-06-17Degree:MasterType:Thesis
Country:ChinaCandidate:L J WangFull Text:PDF
GTID:2192360125953841Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
By analyzing the situations of the equipments for fault recording home and abroad, aiming at the demand of power department and the practical applications, we designed the equipment for fault recording based on DSP (TMS320F206) & CPLD (XC95108).The hardware frame and the methods to calculating the power parameters are mainly discussed in this thesis.With regard to the hardware design, we use the CPLD and DSPs to control the ADS7864, which can sample the six signals of voltage and current at the same time; also we use the CPLD to realize some control circuits, such as circuits to watch the lacking phases, to generate the sample impulses, and the debounce circuit of the keyboard; The communication part of this system provides the interface to the user, and it can receive the upper's commands, set parameters and transmit the information.With regard to the software design, we realized the software filter for anti-intermixing (FIR); and we use the Fast Fourier Transform Algorithm (FFT) to analyze the harmonic of the voltage and current; also we analyze the method of calculating all the parameters of the power system, fault component and positive, negative, zero sequence.At the end of this paper, through the study and analysis of the respective fault location method, comments on their respective advantages and disadvantages.
Keywords/Search Tags:DSP, CPLD, VHDL, FIR Filter, FFT Arithmetic, fault recording, Synchronous data sampling, Harmonic analysis, Electric parameters measurement, watch the lacking phases, fault location arithmetic
PDF Full Text Request
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