Digital Automatic Frequency Selection And Design Of The Dc-dc Controller

With the rapid development of battery-powered portable electronic devices, the battery life has drawn more and more attentions of system designers. In order to prolong the system operating time, high-performance power management is extremely important. Due to the high conversion efficiency, DC-DC switching power converters have been widely adopted. The conventional PWM (pulse-width modulation) scheme suffers from the low efficiency in light-load range. Consequently, the PWM/PFM (pulse-frequency modulation) dual-mode operation is widely used, which switch the DC-DC into the PFM operation in light-load range to achieve a high efficiency. Unfortunately, the switching frequency of PFM operation is determined by the load current, and cannot be predicted. Therefore, the problem of electromagnetic interference (EMI) caused by the PFM operation is difficult to solve. In this thesis, a frequency-selectable fast-transient DC-DC digital controller has been designed, which makes the switching frequency predictable. Also, compared with the PWM operation, the light-load efficiency is greatly improved.Firstly, the fundamentals of a Buck DC-DC converter are introduced, including its principles and operation modes. After that, various loss sources of a DC-DC converter have been analyzed in detail. It can be seen that reducing the switching frequency is the most effective way to improve the light-load efficiency. Based on the conventional solutions for EMI reduction, including the advantages of digital control, the digital frequency-selectable PWM operation is adopted in this design.Then, the critical parameters as well as the number of bits of the ADC (analog to digital converter) and DPWM (digital pulse width modulator) for the proposed Buck DC-DC converter have been determined. A mathematical model of the converter has been developed to accomplish the loop analysis and design. The stability of the loop has been verified using the Simulink in Matlab.After that, the detailed circuit implementations of each block have been introduced, including the finite-state machine (FSM) controller, loop compensator, dither DPWM and linear-non-linear controller. A novel sensor-less load-current judging solution has been proposed to reduce the design complexity greatly.Finally, the measurement results of the digital DC-DC controller in CPLD are given. The DC-DC generates a 1.8 V output voltage from an input voltage of 3.3 V. The output ripple voltage is within 20 mV. The switching frequency (4 MHz,2 MHz,1 MHz,0.5 MHz) is well controlled to be an integer multiple of a fundamental frequency(0.5 MHz), thus the switch harmonics can be predicted and the EMI problem is solvable. The average conversion efficiency of the converter is larger than 80%, and the peak efficiency is 85%. Compared with the fixed-frequency PWM DC-DC converter operating in 4 MHz, the light-load efficiency of the proposed converter is improved by more than 30%. Thanks to the non-linear transient control scheme, the overshoot voltage is well controlled below 50 mV, with the load current jumping between 100 to 350 mA. Moreover, the configurability of output voltage and the soft-start function are also achieved.