Chip Design, Fpga-based Numerical Control Fine Interpolation

In this dissertation, Field Programmable Gate Arrays (FPGA) chip is studied to develop and design the fine interpolation chip. EP1C3T144C8 chip of Altera's Cyclone series is selected to design the three classic interpolation algorithm of point-by-point comparison, DDA and integral by comparison, and simulation for the three algorithms is carried out. Three selected signal ports are designed to make the three algorithm module integrated into a whole circuit.The experimental system for the development of FPGA is designed, with a STC Single Chip Micyoco as a rough interpolation processor, and the PCB for the system is also made. In the development experimental systems, circuit for the download of SCM progromme, and the programming and configuration of FPGA is designed.With the special FPGA configuring chip in the board, FPGA can be automatically configured after electrified.The design and development of fine interpolation chip can be carried out in the experimental systems, so can the validation of the designed function.In order to validate the function of the designed FPGA chip, rough interpolation programme in the SCM is made to generate the incremental rough interpolation coordinate, which is used to be transmited to FPGA chip for the interpolation experiment, and the ideal output pulse is obtained. Then another programme of the SCM to read back and process the output pulse is made, and information of the output pulse is then transmited to PC by the serial port. Finally, the output pulse from FPGA is transformed into track graphic of interpolation experiment by programming for serial communication and drawing track graphic on PCThe final Drawing results show that under the 20 M input clock frequency, the track graphics generated by interpolation pulse are correct, which verifies this designed feature of the three interpolation algorithms is correct. The function of the designed interpolation chip achieves the requirement of a high speed.