A Front-End Design Of Readout Electronics For Time Projection Chamber Based On AGET

The research of neutrino physics has always been a long-standing interest in the particle physics. After the first direct laboratory detection of the two-neutrino decay was achieved, the hypothesis of neutrinoless double beta decay was proposed. Therefore, a lot of experiments have been developed to search for its processes, such as CUORE, NEXT, etc. Once it is verified, the existing standard model will be challenged. However, there is no experiment can prove that neutrinoless double beta does exist so far.The China Jingping Underground Laboratory (CJPL) is the deepest laboratory in the world, which is located in Sichuan. cosmic ray interference will be reduced one over one million. In view of the natural advantages, PandaⅩ-Ⅲ has been developed in CJPL to look for neutrinoless double beta, which can be shield from most cosmic rays. In order to capture the neutrinoless double decay signals, PandaⅩ-Ⅲ experiment requires high resolution, high spatial resolution and low background, so it uses the high pressure xenon time projection chamber (TPC) as the main detector and Micro-Bulk Micromegas as its readout detector. And in order to suppress influence of gamma rays more, the whole system will be placed in high purity water.In this project, about one hundred Micro-Bulk Micromegas detectors are required to read out all the signals from TPC and about tens of thousands of electronics channels are needed if the two-dimensional strips readout method is used. At the same time, the width is bigger and charge amount is larger of the output signal from TPC. Therefore, the readout electronics must meet the need of high density, high integration, low background, low noise, large range and so on.In this paper, first of all, an investigation of ASIC chips has been presented, AGET chip is more suitable for this project. Then a Front-End design of readout electronics for Time Projection Chamber has been carried out based on a prototype scalable readout system(SRS). The readout electronics can be divided by function:the front end plate based on AGET chip to pretreat the detector signal; the adapter plate based on ADC to convert analog signal to digital signal; and the FEC board based on FPGA to store and process data and then send it to PC.On the basis of the above method, hardware design and software design have been completed, and the electronic performance have also been tested in the laboratory. Firstly, the front end board and adapter board have been tested to prove they can work well. Secondly, the system noise has been tested. Thirdly, the response of the chip for different peaking times has been tested, and waveform fitting has been taken. Fourthly, the data compression algorithm has been verified. At last, the performance of AGET chip has been tested such as its input and output characteristics, and its response to input wide pulse signal. All the test results have been analyzed, which show that the readout electronics system based on AGET chip performs well and meets the requirement of PandaX-III. Because of the configuration of AGET is flexible, and it can work well, so this system can also be used for MPGD readout.At the end of the paper, we have concluded the related work of the front-end electronics design based on AGET chip, the shortcomings in the design and the possible work in the near future.