Multi-Core DSP Implementation Of Femtocell Receiver Of WCDMA System

With the wide application of 3G techniques, the concept of Femtocell is gaining more and more attention. Femtocell Receiver, namely "Family Base Station", has become an efficient solution of the problem of enhancing the indoor signal coverage and improving the communication quality inside buildings. At the same time, a kind of novel technology, multi-core DSP devices, has been put more focus due to its characteristics of low cost and low power. The topic of this dissertation is to design and implement a WCDMA Femtocell Receiver using Multi-core DSP devices.This paper discusses the picture of development of WCDMA technology and the background of the appearance of the concept of Femtocell. And the details about the physical channels of WCDMA (FDD mode) are studied, including the frame structure, timing of different channels, the procedure of spreading and scrambling. This paper also introduces the structure of Femtocell Reciver, and the theory and function of each component. This article also explains the algorithm of the cell search procedure, multi-path search procedure and the frequency offset compensation. The procedure of cell search is comprised of three steps:PSC synchronization, SSC synchronization and scrambling code synchronization. Multi-path search means to detect the information of multi-paths of the cell using scrambling code carried by P-CPICH. The multi-paths information will be used for BCH decoding performed by RAKE receiver. The frequency offset compensation adopts CORDIC algorithm to calculate the phase and resist the frequency offset effect by phase correction. Besides the characteristics of the multi-core DSP devices provided by PicoChip are also described, including its chip sturcutre, the type of its processor and the corresponding characteristics, the form that many processors work independently and the data transfer rate. Based on the study about the algorithms and the DSP device characteristics, the paper explains in details about the design and implementation. The content includes hardware resource allocation, signal processing procedure and determination of the key parameters and the rate of data transfer. And the test result is given at the end.The Femtocell Receiver has passed all the test of PicoChip and has been put forward into market as a mature product. The design and implementation of this Femtocell Receiver is meaningful for the improvement of the communication quality of WCDMA systems and the realy use of the concept of Femtocell, and it is a good reference for implementation of communication system using multi-core DSP devices.