The Digital Acquisition And Processing Of Radar IF Signal

This thesis roots from the basic Sci & Tech researching project named "the research of digital processing method of intermediate-frequency signal for marine radar" supported by the Ministry of Transport. The thesis mainly researches on the acquisition and processing method of intermediate-frequency signal. The acquisition, processing, detection and display of signal are all important parts in the study of marine radar. With the rapid development of the digital signal processing technology, there are more and more advantages to process the radar signals on intermediate-frequency in the digital circuit than in the analogous circuit. Digital intermediate-frequency technology is the key technology to realize the function. So this thesis applies the digital intermediate-frequency technology to the marine radar signal, and designs a digital system to sample and pre-process the IF signal of marine radar based on FPGA.This thesis is based on the theory of digital intermediate-frequency technology, it studies the digital sampling theory, digital down conversion theory and constant false alarm rate processing of the marine radar signal. The main research contents in this thesis are the following:Firstly, the thesis summarizes the software radio system and digital intermediate-frequency technology. Selectively analyses the band-pass sampling theory, digital down conversion theory and the design theory of the FIR filter, especially the application in the radar signal sampling and processing and the design method of these theories mentioned above. Besides, it also analyses the CA-CFAR method of the clutter of marine radar.Secondly, a modeling of intermediate-frequency signal is made on the platform of MATLAB and the signal simulated is sampled according to the Band-pass Sampling Theory mentioned above. Afterwards, the sampled signal is converted to two orthogonal signals called I and Q by DDC. The steps of DDC include orthogonal frequency mixing, FIR low-pass filtering and extracting. And within each steps, the wave form after simulation are displayed in this thesis in order to verify the possibility of the designed system. Finally, on the experiment platform of SDZ605, the FPGA design of the system is made according to the signal processing procedure using the ISE software of Xilinx. It contains the module to control the AD converter, the input buffer to memory the data and the DDC module. Besides, the implement method and the simulation results of the functional modules in FPGA are displayed in this thesis and the overall designs are completed and the capability is verified.