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Design And FPGA Implement Of Synchronization For Multi-Carrier DS-CDMA System

Posted on:2010-09-08Degree:MasterType:Thesis
Country:ChinaCandidate:D P ChiFull Text:PDF
GTID:2178360278965521Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
Pseudo-Noise code synchronization is one of the most important techniques in CDMA system, including acquisition and tracking. The good performance of DS-CDMA system is dependent on the performance acquisition and tracking.This paper discusses acquisition and tracking technique of PN code in detail. Design and implement acquisition and tracking algorithm for multi-carrier DS-CDMA system on FPGA.The paper first analyzes the characteristic of PN code and chooses proper PN code for Multi-Carrier DS-CDMA system. Then introduce some acquisition methods, including matched-filter method and correlation method, and analyze some key factors, such as false alarm probability, detection probability and average acquisition time. Then tracking technique is analyzed, including Delay-locked loop(DLL) and Tau-dither loop(TDL).For Multi-Carrier DS-CDMA system, baseband processing is analyzed first. Then propose acquisition and tracking method according to the system. For acquisition, parallel non-consecutive slide correlation algorithm is used. For tracking, Delay-locked loop is chosen. Theoretical performance analysis is also deduced here. Then simulation results in AWGN and multi-path channels are given out. Finally, FPGA implement method is proposed and test result is shown.From the test result it can be seen that PN code synchronization algorithm meets the requirement and ensures reliable communication.
Keywords/Search Tags:Multi-Carrier, DS-CDMA, PN Code, Acquisition, Tracking, FPGA
PDF Full Text Request
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