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The Design Of Low Phase Noise Integrated Quartz Crystal Oscillator

Posted on:2010-03-31Degree:MasterType:Thesis
Country:ChinaCandidate:L WangFull Text:PDF
GTID:2178360275982152Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Quartz crystal oscillator is one of the most stability frequency references. Because of the high Q and low input coefficient of the quartz crystal resonator, the quartz crystal oscillator has many excellent advantages, such as high frequency stability and good aging rate. Nowadays, it has been widely used into communications, radar, navigation and any fields which need high stability oscillators.At present, crystal oscillators, in China, are mainly made by discrete components。As the development of the technology and process, it is necessary to develop a low phase noise integrated crystal oscillator.At first of this paper, we reviewed the development status of crystal oscillators. Then the physical characters and principle of the quartz resonator have been discussed. We compared the advantages and disadvantages of several oscillator schematics. Besides, the conventional principles and models of phase noise were deeply researched and analyzed.The whole oscillator can be divided into several cells. The first one is the bias circuit which could provide the oscillator with stable bias current and voltage, in spite of the change of temperature and sources. And then, the cross coupled crystal oscillator circuit with dual-output was proposed. In order to reduce the phase noise of the oscillator, we discussed the application of Leeson phase noise model to this circuit and show our opinions and improvements of the model. For isolating the output load, the folded cascode buffer was lead in. We finished the basic arguments and parameters calculation of the components. Different kinds of simulations have been made to verify and confirm those component arguments. All simulations run with the computer circuit simulation tool Spectre of Cadence. The process design kit of this design is TSMC 0. 18μm Mixed Signal Process. All layouts of cell circuits were accomplished based on the Virtuoso of Cadence,and passed the DRC, LVS verification.The simulation results indicate that: the phase noise of the oscillator with 20MHz AT cut crystal resonator model is ? 132dBc /Hz@100Hzat 27℃, while the Vdd is 3.3V. The Voltage peak to peak is about 880 mV. The crystal oscillator shows a decent performance and meets the needs of our design.
Keywords/Search Tags:Quartz, Integrated Oscillator, Phase Noise, Phase Noise Model, Layout
PDF Full Text Request
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