Design Of Adaptive Multi-channel Serial Redundant Bus Protocol Framework And Simulation Platform

In the process of using and researching modern weapons,the internal electronic equipments are prone to failure.The failure which is resulted from the interface and bus is particularly prominent.The reason is very simple,the interface and bus are exposed to the external environment,which makes them easily interfered and damaged.They bear the heavy exchanges of information among the electronic equipments,once the fault occurs,it will lead to the failure of data transmission and serious consequences.Aiming at the problems that the interface and bus are easy to be interfered and damaged, the thesis deeply studies the current demands and characteristics of the military bus,analyzes the advantages and disadvantages of various military buses.On this basis,the concept of adaptive multi-channel serial redundant(AMSR) bus is promoted.Then design the bus interface framework,work patterns and work process,and define the data format and message format.The key technologies that this bus refers to,such as LVDS data transmission,error control and so on are also studied,and design the functions on the basic data transmission of the bus physical layer,the checkout and resend of the data link layer,and data adaptive distributaries.In allusion to the design requirements of the bus protocol,we reasonably choose the FPGA chips,design the hardware emulation platform,and figure out events to be noted in the design process.Finally,we simulate and test each function module on the hardware platform.Through the test results,it is obvious that the various functional modules meet the requirements of the design,the hardware simulation platform has the function of simulation and test,and the architecture of bus interface protocol is reasonable and meets the task requirements.