Hardware Acceleration Of Fundamental Arithmetic In Public-Key Cryptography

With the rapid development of information industry, people depend on information technology increasingly. As a result, information security is getting more and more important. Cryptography is an important means to ensure network security. Public-Key Cryptography is the core of modern cryptography, and the primary means for solving authentication and keying exchange.The key operation of Public-Key Cryptography arithmetic is finite field arithmetic, which is the arithmetic-intensive and inefficient operation of big integer. Public key Cryptographic algorithm is implemented by hardware for performance reason. How to improve efficiency of Public key Cryptographic algorithm by hardware are studied in this thesis.Firstly, common Public key algorithm and related mathematical principles is introduced, which lay the foundation for the idea after text and make the key questions to resolve concentrated in underlying finite arithmetic. Then, two new hardware-inverses in binary finite fields and parameter optimization on multiplier on Binary Finite Fields are described in detail. That means a complete system for Public key Cryptographic underlying arithmetic is constructed.On the base of analyzing some classic inverse algorithms, almost inverse is selected to be improved, because its grading characteristic can achieves lower transmission delay. The low of relevance between adjacent degrees is discovered through analysis on inverse process. Current degree is obtained quickly using relevance low, which can compress clock cycles needed in an inverse. Clock is further compressed through decomposing and recombining the steps of almost inverse algorithm. The result of experiment shows that the efficiency of new module can catch up with or even be superior to many classic algorithms because of optimization on clock and delay.Next, to the deficiency of previous inverse scheme in logic gate delay, bidirectional shift structure is proposed in this thesis. When solving new degree, dynamic search whose delay is serious is replaced with reverse shift. Then Critical path delay is reduced to O(log₂(log₂m)) from O(log₂m). Analysis shows that the theoretical comprehensive properties of bidirectional-shift almost inverse module in binary fields are good. Experimental results prove that the efficiency in actual execution is satisfactory, and has comparative advantage with most international and domestic classic algorithms.The speed of multiplication in finite field is higher than inverse naturally, but its efficiency is not wholly satisfactory, too. After the analysis on some excellent multipliers in finite field, parallel-series multiplier on optimal normal basis in GF(2²³³) is realized, pipeline stages of logic gates network and the degree of multiplier's parallelism are measured in experimentation and these two parameters are optimized in this thesis. At the same time, the law of k value in second stage of almost inverse algorithm is demonstrated in this thesis. Base on the low, a feasible scheme to raise efficiency useing checking list is proposed.