The Development And Optimization Of H.264/AVC Video Compression Algorithms Based On BF-533 DSP

H.264/AVC is the newest international video coding standard jointly developed by the ITU-T VCEG and the ISO/IEC MPEG standards committees, which aims to significantly improve compression performance and enhance robustness to network environments. To achieve such a high coding efficiency, H.264/AVC adopts many new and advanced coding techniques , Compared with H.263,H.264/AVC can achieve approximately 50% of bit-rate reduction with equivalent video quality respectively.At the same time, H.264/AVC enhances ability of error resilience and network adaptation with the help of "network-friendly" bits stream syntax and semantics.But the increase in coding efficiency comes at the expense of several times in complexity with respect to earlier standards. The high coding complexity has significant impact on the applications of real time video coding .On the other hand, with the fast development of modern digital signal process technology and the manufacture of semi-conductor, Digital Signal Processor(DSP) technology has been widely applied because of its predominant properties and cheap prices. DSP technology possess high efficiency instruction sytem and fast computation performance and it is effective to be used in audio and video processing system. Therefore, research on video coding sytem with DSP and its affiliated devices have become a research focus in current video application system.This paper makes an effort to realize an real time H.264/AVC video coding application system based on Blackfin 533 DSP hardware platform of Analog Device Inc,so just as an significative practice to H.264/AVC actual application. Firstly, two parts with high computation complexity in H.264/AVC, intra prediction and inter mode decision, is studied. A fast algorithm of intra prediction is proposed,and an improved algorithm for inter mode decision is presented, experimental results show that the algorithms enhance the encoding speed significantly , reduce the computation complexity with slight PSNR drops. Moreover, based on the study of the hardware structure of the DSP chip, the JM module with the fast algorithms of H.264/AVC is transplanted to BF-533 DSP. Finaly, from four aspects: programe level, DSP memory level, algorithm level, and instruction level, relative optimization about the DSP is applied in the video coding system. Experienmental results demonstrate that our relative optimization can achieve a good performace in reducing computation time.