The Implementation And Optimization For Support Vector Machine

Support Vector Machine(SVM) which is a new branch of the machine learning is now applied in face detection, speech recognition and digital image processing more and more. SVM usually has a better performance than the conventional methods because it is to acquire the best function when the number of training data is small which is often met in true-life. Therefore, the generalization abilities of support vector machines is better significantly than other methods. In other ways, the feature space and kernel functions are introduced to the SVM which solves the linearly inseparable problem and reduces markedly the amount of the computation in the feature space. These enhancements put SVM forward and make it applied in more fields.In this article, the focus is the hardware-based implementation and optimization for SVM. First, some implementation methods for SVM are given. After that, they are modified and transformed to the hardware-friendly algorithm called unfixed bias SVM algorithm. Based on this algorithm, two circuit structures are showed and analyzed in following article from the performance and the area of circuits.As you see in the article, the presented circuit structures are tested in the Sonar dataset. To avoid the error involved by quantization, the precision of each number must be less than 2^-10. In the contrast of two structures, the SVM in serial structure has a good balance between the training speed and hardware area, also this structure is agile because it can make itself to suit the number of the sample which is less than the expected. At the same time, the parallel structure is very fast in the training process and can be applied in the areas where there needs high performance.