The ASIC Design Of Intra Prediction Of H.264 Video Decoder

H.264/MPEG-AVC is a video encoding & decoding standard which is established by the JVT which is constituted by ITU-T's VCEG and ISO/IEC's MPEG. It is not only the H.264 of ITU-T, but also the part 10 of MPEG-4 of ISO/IEC. H.264 is a widely accepted video encoding & decoding standard, it could be used from the service of mobile video to meeting conference, IPTV, HDTV and DVD. It almost covers all the applications of video processing. Its basic system is into the open and needn't copyrights.H.264 added new intra predicted encoding of single picture, and made use of the left and up macro block pixels which have been decoded and restructured of the predicted block to predict the current block. It only needed to encode the difference between the current block and the predicted block. The information of block of intra encoding could be expressed by a few of bytes, decreasing the redundancy bytes of correlate information. H.264's intra-prediction divided the macro block into three types: 16*16 macroblock-predictions modes of processing static and moving slowly pictures, 4*4 macroblock-predictions modes of processing complex and moving intensely pictures, and 8*8 macroblock-predictions of color pictures. Every mode also offered multi-directions'spatial-prediction modes: 9 modes of intra₄*4, 4 modes of intra₁6*16 and 4 modes intra₈*8(including U and V the two equal color block, every block had 64 pixels predicted.) , there were 17 intra-modes in the way of prediction. The motion-estimation of intra-prediction of H.264 had improved from the 1/4 pixel-precision to 1/8 pixel-precision, but the complexity of decoding was about 3 times than that of MPEG-2. Owing to decoder was strictly limited by the standard of encoder, the flexible of its algorithm is quite small, but the designer still could assign the structure of the decoder from the beginning and research the multi-layer nesting loop in the referenced software to settle disturbances and abstract codes. The aim is to improve the speed of decoding.Transplanting the procedure of decoding to hardware is a meaningful breakthrough. The advantage of hardware to the software is evidence: the trait of hardware is quick decoding speed and parallel processing. The project based on hardware has a great outlook. However, the hardware couldn't deal with a complex control and couldn't be remedied when the design was over; still others, the price of hardware is very expensive. So, before done it needed software-experiment-flat to give it assistance, which is the common ground of many researchers who deal with the fact of hardware. Separate the hardware and software into two parts: motion- compensation and boundary-filtering. In the part of motion-compensation, hardware is used for decoding the module of macro block. Utilizing the advantage of hardware may achieve more efficiency of decoding and real-time decoding.Video decoding has two researchable directions: the first is the decoder's fast decoding algorithm. The part of decoding & encoding adopted two algorithms: context-based adaptive binary arithmetic coding and entropy coding method in the results of current researching. The entropy coding method includes universal variable length coding and context adaptive variable length coding. In the procedure of decoding, inter-prediction is needed to get the data of image which is gained though adding current block's prediction block in its reference pictures to the dispersion of decoding. If you want to improve the frequency, the key point is looking for a good algorithm. The second is the part of real-time decoding. In this part, there are many difficult, just as FIFO circus which will lead to the sub-stabilization, and many implementation ways like CPU implementation, DSP implementation, ASIC implementation and FPGA implementation. Choosing a way which is economical and efficient is the footstone of this paper.This paper compared some methods of decoding, and chose the ASIC to accomplish decoding at last. Choose some advanced algorithms as far as possible in design process; particularly carry on the optimization to the decoding process. Only in this way can obtain the quite good result, and make the decoding speed to improve largely。This paper in earlier period mainly used software simulation, as a result of ability limited, when the paper completed did not have hardware's material object which is this paper the biggest regret, but according to the software simulation's result, the author believed that hardware material object could form very quickly in the future. This paper comes from the request of the video decoding development. Today, in our society, the requests of digital television and other video products are unceasingly improving and the request of speed and price of decoder are also unceasingly enhancement. One kind of reasonable price, highly effective and high clear decoding product will quickly seize the market; therefore each scientific research institution will promote the new model decoders when they will pay more attention to the economic benefits. In this aspect, this paper also has a very big improvement space.