Research And Design Of The Multistage Architecture And Scheduling Algorithm For Large-Scale Switch

With the rapid development of Internet and broadband communications technology, the information and devices of Internet is growing with exponential speed, meanwhile, the capacity of transmission is largely improved by the growing transmission technology. Switches and routers are highly demanded and the key of realization of high speed back bone network as the main interconnection devices of Internet construction.This paper introduces the application and nonblocking conditions of the three-stage Clos network firstly. After that, the architecture of a packet switch based on the three-stage Clos network is proposed. Next, the data flow, frame processing of input port controller and output port controller and the structure of centralized packet scheduler are described.After introducing the concepts and architectures of the multistage switch, the author focuses on the design of packet scheduler and the strategy of scheduling. Packet scheduler is the center and key of the design of switch. A dual-level matching strategy based on frame is proposed in this paper. The strategy is composed of module-level matching and port-level matching, a heuristic parallel matching algorithm is used for routing, and the E-iSLIP algorithm based on the iSLIP algorithm is used for scheduling. The exhaustive service strategy and priority concept are both used in the E-iSLIP algorithm to improve the performance under burst traffic. After that, the simulation of E-iSLIP and iSLIP are introduced in details and the results of simulation are analyzed also. It can be seen clearly that the E-iSLIP outperforms the iSLIP algorithm under burst traffic in delay performance and maintains stable under uniform traffic. Besides, E-iSLIP which employs priorities has better fairness than that without priorities.