Optimal Instruction Scheduling For TTA Processor

The complexity of embedded system has been increasing together with increased performance and energy efficiency requirements. Customizable application-specific processor (ASP) has been proposed to meet the requirement. TTA is an ASP architecture and resembles VLIW architecture, but more customizable and more energy efficient.A complex software framework is needed to design for supporting customizing processor efficiently. The design of compiler in software framework is important part and it must be able to optimize code for different architectures, including instruction selection, instruction scheduling and register allocation. In TTA, a calculation operation is replaced by several data transfers, so more optimization can be done, but it brings more complexity into design of compiler.We focus on instruction scheduling in the scope of each basic block. A list scheduling algorithm is presented and a conclusion is arrived by using Genetic Algorithm: TTA code optimized by list scheduling based on operations is close to best result that can be arrived by scheduling algorithm based on operations. We propose a scheduling algorithm using Integer Linear Programming (ILP), which can produce 30% better code than list scheduling. For ILP is time-consuming, an algorithm combining ILP and list scheduling is proposed to reduce computing time. The result shows that the combining algorithm can arrive at worse code than ILP but better than list scheduling.