The Design Of Low Voltage PWM DC/DC Converter Chip

With the miniaturization of electronic devices, more and more battery-powered portable devices like mobile phone, digital cameras are produced. But the battery which only provides a single voltage can't provide different voltage for the different devices in the equipment. It has great significance to develop the switch-mode power supply (SMPS) chip as a type of voltage converter chip.This thesis establishes the pulse width modulation (PWM) mode, the current control mode and Boost topology for the SMPS chip according to the SMPS structure, three modulation modes, two control modes and four kinds of topologies. In the thesis, a PWM current control of Boost converter chip is designed and the design comprises the bias current, voltage reference, oscillation, error amplifier, PWM comparator, slope compensation circuit and soft-start circuit such as modules design. A Bandgap reference technology is used to make a very small temperature coefficient voltage reference; the cascade structure is using to improve PSRR for ensuring the stability of voltage reference. In the system of all relevant operational amplifier design, a frequency compensation technology is used to solve the issue of system stability. In order to prevent the harmonic circuit inductance affect the stability, slope compensation circuit is designed to eliminate the influence. At the system level and circuit-level analysis and design, the entire system was simulated to ultimately meet the design requirements by using the Hspice tool. In the back-end IC chip design, the "multiple fingers" technology and the "common-centroid" technology are used to reduce the error of the matching circuit module which is very sensitive to process. Upon completion of layout design, Dracula software tool is used to do the design rules check and electrical rules check. After completed the layout comparison with the circuit, the GDSII file are sent to the foundry.In this thesis the design of low voltage DC/DC converter chip uses CSMC 0.5μm, N-well DPTM standard CMOS process. Final testing of the chip packaging, results show that, although the chip's performance failed to reach the expected level, but the basic boost PWM chip functions and other auxiliary functions have now been achieved and it has good characteristics such as wide input voltage(2.2V-5V), stable output voltage(5V).