Research On Fault Diagnosis Approach At Sub-network Level In Large-scale Tolerant Analog Circuits

Analog circuit testing and fault diagnosis have been a hot research topic since 1960s. With the rapid development of electronic technology and great process of integrated electronic circuits, various theories and methods of components-level fault diagnosis have been difficult to adapt to the needs of large-scale network fault diagnosis. So the fault diagnosis approach based on sub-network level in large-scale analog circuits is the urgent requirement to analog circuits fault diagnosis. But the existence of an unbalanced components tolerance greatly restricts the further development of analog circuit, especially the development of large-scale circuit fault diagnosis, and which becomes popular realm and difficult research problem in analog circuit fault diagnosis.This paper researches the fault diagnosis approaches at sub-network level in large-scale analog circuits, focusing on the exploration of the large-scale tolerance circuit diagnosis based on network torn approach and tries to boost the method systematically and practically.In view of the problem whether the tear nodes be accessed or not, this paper researches a modified nodal torn approach. The method introduces pseudo-tearing nodes and makes the network tearing more flexible. Combined with the characteristics of intersected-torn search and multi-level torn search, the paper proposes the testing conditions of tolerant sub-networks by applying interval mathematics and genetic algorithm, and which provides a fast and effective method for locating faulty sub-networks in large-scale tolerance circuits.Based on statistics theory and analysis on sensitivity, the circuit tolerance is disposed and a neural network fault diagnosis approach at sub-network level in large-scale tolerant circuits is presented. Combined with intersected-torn search, the fault information of large-scale circuit is saved into several neural networks. The samples are obtained by adding the random noises translated by the responses of tolerant circuits to the samples of responses without tolerance. Fault location is performed by means of the proposed Back-Propagation genetic algorithm and a synthesizable neutral network. An example shows the method's efficiency.An approach of multiple faults diagnosis for large-scale tolerant analogue circuits is proposed. The method combines the fault diagnosis algorithm based on the linear-programming concept and the network torn approach, and which can diagnose the double faults of tolerant circuits quickly and accurately. An example illustrates the efficiency of the proposed method. In addition, verification experiments for the realization of shielding method at sub-network level are done.