Rate-Distortion Optimization And Assembly Optimization For H.264 Video Encoder

The purposes of this thesis are improving the computation efficiency and enhance the performance of video encoder in real-time application.Firstly, this thesis introduces the basic principle of video coding, and then discusses some technologies in detail. The substance includes the reasoning of DCT transforming, the processing of quantization, the basic rate-distortion optimization methods and so on.This thesis focuses on two aspects of optimization, the one is rate-distortion optimization and the other is assembly optimization. In order to optimize the processing of mode decision, the prediction modes are divided into several groups under the framework of rate-distortion optimization. At the same time, the order of channel simulation is changed to save the cost of time. The test results show that it can bring about 40% time reduces compared to the original method. At the aspect of assembly optimization, some C codes are replaced by assembly codes with MMX instructions. The usage of MMX instruction sets greatly improves the computation efficiency and the performance of H.264 video encoder.Finally, the optimized encoder is tested with several different standard testing sequences. The results show that the using of these methods greatly enhanced the performance of the encoder with little image quality dropping.