| As people pay more and more attention to the information assets, information security has become a hot topic among the IT industry. Meanwhile, the attacking technology is also becoming more and more advanced. The key part of security systems has been moved from the software to the hardware, especially the integrated circuits. The reason is that hardware has higher security level, compared with software. However, with the improvement of signal measurement and analysis technologies, cryptographic circuits are facing many kinds of attacking methods. Among them, Side Channel Attack is a kind of attacking method with great threats.This paper focuses on the Side Channel Power Attack. After finding out that the source of Side Channel Power Attak, which is the unbalanced representation of logic in real circuits, we elaborated Simple Power Analysis and Differential Power Analysis. To get real experimental data, we described a measurement platform built for Side Channel Attack specially. Based on the necessary condition of the above two kinds of attacking methods, we proposed several kinds of countermeasures from two levels: 1) algorithm level and 2) circuit level. On the algorithm level, we presented secure implementations for three most popular cryptographic algorithms (RSA, AES, and DES). For the public key RSA algorithm, a randomized modular reduction is presented based on the MIST implementation. Because the MIST algorithm does not take the modular reduction into consideration, randomized modular reducation is an effective way to enhance the security of the whole RSA cryptographer. As for the symmetric key algorithms, such as AES and DES, a balanced point was found between area and speed. On the circuit level, we did theoretical analysis on three existing circuit level countermeasures (WDDL, RSL, and MDPL). We found that these circuits all suffer from power leakage. As an improvement, DRSL is proposed. Experimental results showed that the security performance of DRSL is much... |
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