Research And Implement Of FPGA-based Hyperelliptic Curve Cryptosystems

Along with the rapid development of computer technology and the network communication, in particular electronic commerce and the electronic government affairs widespread application, the information security more and more obtains people's recognition. The study of cryptography, an important constituent of information security, also becomes an extremely active research topic of current computer science domain. Hyperelliptic curve cryptography (HECC) is one kind cryptography system which is more difficult to be broken than elliptic curve cryptography (ECC). At present, the theory of HECC is already basically mature, and what domestic and foreign mainly concentrate on is how to realize the HECC. Because HECC's encrypted strength is very high, and computation complexity is very great, therefore, to realize the HECC will have great theory significances and application values for enhancing the information systems security and researching the more powerful cryptography. Moreover, because the HECC based on smaller base field may have the same strength with ECC, it will have large application prospect in embedded systems.This paper first introduces the research background, mathematics foundation, correlative algorithms and the key technology of FPGA-based HECC, and detailedly introduces the public-key cryptography system, the elliptic curve cryptographic system, the hyperelliptic curve cryptography, the hyperelliptic curve cryptography system, the correlative algorithms and the present research results which are all correlative with this paper. The main content and resolving schemes of this paper are introduced generally.Then, the improvement, the design and the realization of finite field algorithms, polynomial ring algorithms and divisor algorithms are introduced. We deeply study the paper which gives many algorithm realizations, and detailedly discuss its design thought and hardware architecture. The main content includes: the multi-bit parallel field multiplier, the field inversion, the polynomial ring greatest common divisor (GCD) unit and divisor addition unit and so on. Comparing with the predecessor, this paper uses the divisor addition unit structure which enhances the parallel degree of lower layer, and reduces the parallel degree of upper layer. The lower layer adopts 4-bit parallel field multiplier, 2-bit parallel field inversion, as well as polynomial ring...