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On The Design Of A FPGA-Based OFDM Modulator And Digital Filter For IEEE 802.16d

Posted on:2007-08-19Degree:MasterType:Thesis
Country:ChinaCandidate:Y F LouFull Text:PDF
GTID:2178360182970857Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
IEEE 802.16d standard specifies the air interface of fixed broadband wireless access (BWA) systems supporting multimedia services. This thesis research the realization of IEEE 802.16d standard 256 OFDM PHY baseband system based on FPGA.Radix-4 DIT Fast arithmetic is used to realize 256 subcarriers OFDM modulation and give out an efficient implement structure based on FPGA. OFDM signals have a great Peak-to-average Power Ratio(PAPR),the methods of reduction OFDM signals PAPR is discussed and the clipping and filtering method to reduce PAPR is adopted.FIR is not only used in reduction OFDM signals PAPR based on clipping and filtering method, but also in Digital-up Converter and Digital-down Converter. Downlink synchronization also need FIR. However, the realization of the FIR(especially the high FIR) in FPGA needs large resource, efficient designs of various FIR in the baseband system is very important. Properly using Distributed Arithmetic and Multi-Channel structure can reduce requirement of FPGA resource obviously. Also it can be Implemented efficiently using a Polyphase Decomposition when Interpolation or Decimation is needed, and a method to exploit the symmetric structure of polyphase filter is proposed.
Keywords/Search Tags:IEEE 802.16d, OFDM, Peak-to-Average Power Ratio, FIR Filter, Distributed -Arithmetic
PDF Full Text Request
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