Research On General Encoding Algorithms For LDPC Codes And FPGA Implementation

Low-Density Parity-Check Code was first discovered by Gallager in the early 1960s and was rediscovered and considered as a class of Shannon-Limit approaching code in the late 1990s. Quasi-Cyclic LDPC code, which is a kind of constructed LDPC code, possesses a similar decoding performance and an error floor character with random constructed code. Besides, its encoding algorithm can be easily hardware Implemented. This thesis focuses on the efficient encoding and hardware implementation.1. Based on the LU decomposition encoding method, bring out a new algorithm, by permuting the H matrix first, making it a systematic-code. Using this algorithm, by giving a H matrix, could encode rapidly.2. For the QC-LDPC code, based on the problem that existed in the encoding part, bring out two methods, that could get the G-matrix rapidly from H-matrix. Then can encoding easily by G-matrix.3. Made some optimization on some parts of the LU encoding structure. The structure and the relationship were simplified. By using parallel structure, could encode constantly. For QC-LDPC encoding algorithm, chose a best encoding method. Basing on the analysis of the problem that between the speed and the source, chose a proper structure to get a balance.