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Design And Implementation Of Dual Channel Speech Enhancement System

Posted on:2012-07-30Degree:MasterType:Thesis
Country:ChinaCandidate:P L XiaoFull Text:PDF
GTID:2178330338489704Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Speech communication always is disturbed by noises from surrounding environment, transmission medium, devices and even other speakers. Due to these disturbances, speech singals received finally are not pure, but contaminated by noises. So people need speech enhancement system for normal communication in the noise environment. Speech enhancement does not only involve speech digital signal processing, but also hearing sense and phonetics. In addition, there are lots kinds of noise sources with different characteristics. As a result, a general speech enhancement system should be designed to meet the need of speech communication in all kinds of noise environment.In the processing of practically using Digital Hearing Aids and miniaturized speech devices, non-stationary noises and the processing of adaptive convergence will impair speech performance. To deal with these problems, design a new real-time Speech Enhancement System. The system bases on dual channel first-order differential microphone array, and makes use of time division multiplexing structure and efficient Hanning windows, so this system can obtain high speech enhancement performance and save hardware consumption. The system is able to achieve a 3.5 dB signal-to-noise ratio gain, and has been verified by Verilog on FPGA, avoiding some problems and limits of single channel or adaptive method speech Enhancement system. As a result, improving anti-noise performance of miniaturized speech devices on the level of hardware, this design lays a foundation for R&D of Digital Hearing Aids and involved ASIC.
Keywords/Search Tags:digital hearing aids, speech enhancement, dual channel, optimization design, FPGA
PDF Full Text Request
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