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The Research Of Real-time Unwarping System For Catadioptric Panoramic Video Based On FPGA

Posted on:2012-06-27Degree:MasterType:Thesis
Country:ChinaCandidate:Y YuFull Text:PDF
GTID:2178330335970297Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
We can acquire the scenes of all directions around by panoramic cameras. The observer can get the changes of surroundings quickly. It is not only more convenient than traditional ways which get the panoramic images by multi-angle camera group but also is economic in saving hardware resources. This is a new technology. It can be implemented on various hardware platforms by the rapid development of VLSI (Very Large Scale Integrated circuit) technology. Especially, the high integration degree, low power consumption and powerful parallel processing capability of FPGA (Field Programming Gate Array) doesn't make it only can be used like a high performance CPU, but its flexibility also makes designers can modify, configure and collate the internal logic architecture of the system to meet different data processing demand.The main content of this paper is as below:1. The relationship of the thickness, radius of underside and visual angle of three panoramic catadioptric mirrors is detailed analyzed. The distortion degree is also analyzed.2. The cylindrical panoramic images of spherical mirror which are unwarped by Light Path Backtracking algorithm and Ring Approximation algorithm are compared based on spherical mirror. The real-time unwarping system is implemented based on FPGA.3. Considering of the system performance and cost, DE2-70 development and education board of Terasic is used as the platform of this system. ITU-R BT.656 decoder, SDRAM controller and panoramic unwarping algorithm is programmed by Verilog hardware description language on Quartusâ…ˇ. The functions of video acquiring, frame storing and unwarping were achieved.The results of experiments showed that the system achieved the real-time unwarping for panoramic video and the high stability. The whole system consumed 18% LEs,81% M4K,7% multiplier and 75% PLL of EP2C70 FPGA, the other logic resources could be used for arithmetic.
Keywords/Search Tags:Panoramic video unwarping algorithm, Spherical mirror, FPGA, ITU-R BT.656
PDF Full Text Request
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