Design Of The Programmable Image Reject Filter In The Multi-mode Multi-frequency Wireless Transmitter

Relies on the growing development of the deep sub-micron CMOS fabrication process, the fully integrated RF single-chip wireless transmitter has become one of the most challenging design today. To adapt co-existence of multiple wireless protocols nowadays, multi-mode multi-band transmitter is pushed to the front of research. As an indispensable part in a transmitter, analog baseband filter has long attracted enthusiastic attentions from circuit designers. With zero-IF structure becoming mainstream architecture of the transmitter, the filter has to offer a tunable cutoff frequency and should also respectively satisfy the requirements of different standards.In this thesis, image reject filter in the multi-mode wireless transmitter is study. It can be adapted to UHF RFID, GSM, TD-SCDMA and 802.11 a/b/g protocols. The fruit of the research are listed below:1. the paper points out the filter will affect the accuracy of the transmitter modulation and adjacent channel power. After that the filter's required attenuation in each mode are obtained, as well as the minimum requirements to satisfy the use of multi-mode.2. According to these requirements and zero-IF transmitter architecture, we proposed a dual-4th-order Butterworth low-pass filter for the multi-mode wireless transmitter. In the circuit design, active-RC structure with superior linearity is applied. By innovatively cascading two 4th-order filters in the circuit, design complexity is simplified and the attenuation at twice cut-off frequency is maintained.3. The proposed Op-Amp produces 358.6MHz gain-bandwidth product with 1pF load, and the DC gain comes to 67.5dB. This Op-Amp effectively limits the linearity deterioration of the filter at high cut-off frequency. Another high gain-bandwidth Op-Amp is designed afterwards, making the ripple reduced to 10% of the original, which is only 0.3dB.4. The latter part of the paper describes the layout design and the chip test solution. The chip area is controlled at 0.5355mm2. Tests show that the filter consumes 7mA current from 1.5V power supply. The bandwidth can be switched ranging from 1.8MHz to 14.62MHz. The measured linearity at the highest cut-off frequency is 11dBm. Twice cut-off frequency attenuation comes to 43dB. The design is proved to be successful.