FPGA Implementation Of IEEE802.11a Base-band Modulator And Research On Reducing Peak-to-Average Power Radio

With the rapid development of communication technology, the network is required to provide integrated broadband multimedia services, which consist of data, voice, image, video and so on. Therefore, Beyond 3G mobile communication system, which has larger capacity and higher transmitting data rate, undoubtedly becomes a hot spot of researching. Orthogonal Frequency Division Multiplexing (OFDM), which is the key technology of the B3G system, is currently under significant investigation due to a high spectral efficiency and immunity to multipath fading and impulse noise. Meanwhile, in order to eliminate the bottleneck of "last mile" in the connection of computers and wired networks, various Broadband Wireless Access (BWA) technologies come forth due to their many advantages. Wireless Local Area Network (WLAN), which is widely used, is a typical application. Especially, IEEE802.11a PHY is based on OFDM modulation.With the development of IP technology, the "burst mode" transmission techniques have recently received considerable attention. This thesis presents the studies of the IEEE 802.11a PHY, which is a packet-based OFDM burst-transmission system.Depending on our own Broadband Multicarrier Transmittion Platform, it presents the practical scheme to implement the IEEE802.11a OFDM baseband modulator with Field Programmable Gate Array (FPGA). Considering the frame construction of the transmitter, the thesis introduces the function, design-scheme and implementary architecture of the FPGA-modules. Finally, it gives the hardware testing results.OFDM-based broadcast systems are known to be significantly more sensitive to nonlinear distortion caused by High Power Amplifier (HPA) because of its large Peak-to-Average Power Radio (PAPR). This major disadvantage will decrease the efficiency of OFDM systems. The thesis proposes the methods for reducing the large PAPR by adaptive predistortion and Golay complementary codes. As well, it gives the primary results of computer simulations and hardware implementation scheme.