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Research On Fast Algorithms In H.264 Video Coding And Error Detection Of Arithmetic Codes

Posted on:2005-01-08Degree:MasterType:Thesis
Country:ChinaCandidate:M YangFull Text:PDF
GTID:2168360152968047Subject:Information and Communication Engineering
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With the rapid progress of hardware and software processing ability and increasing requirement of multimedia information, digital video technology has achieved great development over the last two decades. The demands for the interconnecting capability and interoperability with video streams supplied by different vendors boost the emergence of international video compression standard. In the meantime, the standardization greatly promotes many new application fields of digital video, such as digital television, Internet multimedia streaming service, interactive digital storage for personal entertainment and video conference.H.264/AVC is the newest international video coding standard, joint developed by ITU and ISO/IEC, a great many of novel algorithm components enhance the coding efficiency significantly, while dramatically increase the computational complexity than the previous standards. How to reduce its complexity and accelerate the execution speed while maintaining the outstanding compression performance is a crucial problem in the H.264 application. This dissertation mainly addresses the software implementation problem of H.264 encoder. Based on the analysis of various algorithm compositions' computational complexity and the contribution to the compression efficiency, a novel fast motion estimation algorithm focusing on the tree structured motion estimation in H.264, successive elimination diamond search (SEDS), and a new fast macroblock mode selection (FMMS) method based on the classification of macroblock motion content are proposed. The proposed fast algorithms reduce the block matching calculation substantially while maintaining similar coding efficiency. Simulation results demonstrate that the block matching calculations in full-pel motion estimation are reduced to 0.2%-1% by employing the SEDS algorithm, and further reduced by 40%-70% with FMMS. Furthermore, the dissertation studied the important SIMD optimization methods with MMX/SSE2 assembly languages and other optimization means on Pentium-4 platform. A practical H.264 software encoder is implemented which can encode QCIF and CIF format image sequences in real-time.The bitstreams of arithmetic codes are very vulnerable to transimission errors, so the implementation methods of one of the entropy coding options in H.264 standard, the context-based adaptive binary arithmetic coding, are studied in the last chapter of the thesis. With the analysis of the finite precision implementation of the arithmetic coder, a new error detection method using multiple forbidden symbols is proposed. With the same amount of redundancy, the new method can achieve better error detection capability than the previous single forbidden symbol method in terms of the bit and symbol detection distances, which is very helpful for joint decoding of arithmetic codes.Parts of the achievements have been applied to some practical video communication systems. The fast algorithms and optimization methods in this dissertation can be referenced by other multimedia software algorithm optimization, and have practical significance to the application of H.264/AVC video coding standard.
Keywords/Search Tags:video coding, H.264/AVC, motion estimation, SIMD optimization, error detection of arithmetic codes
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