Implementation Of Real Time Video Coding System Using DSP On Low Bit Rate Channel

Video coding realization in narrow band channel is a hotspot in video processing field. ITU-T Recommendation H.263 which can be used for compressing the moving picture component of audio-visual services at low bitrates less than 64kbps is adopted in my article. The basic configuration of the video source coding algorithm is a hybrid of inter-picture prediction and transform coding based on ITU-T Recommendation H.261. In addition to the core H.263 algorithm, four negotiable coding options which include Unrestricted Motion Vector mode, Syntax-based Arithmetic Coding mode7Advanced Prediction mode and PB-frames mode are the key technique to improve the performance of coder&decoder. In view of the essence of video coding which is digital signal processing, among many methods that realize video coding, the method based on DSP chip also bears remarkable advantage besides pure software method. A H.263 real-time video coding system based on DSP chip is then designed which follows the flow of the DSP developing in this article.Front-end video acquisition circuit and video output circuit have been designed based on the flow of the DSP developing. In this system, adoption of CPLD which is used for connection of signals and logical combination contribute to the debugging of system. The format of output picture is set to QCIF by I2C which has been implemented by CPLD. Communication between PC and DSK also has been realized, the picture has been transferred to PC by HPI and been displayed dynamicly.TMS320C6711 of TI corp is selected for H.263 core algorithm processing in the system. In the system software design, H.263 core algorithm modules (DCT, DCT, motion estimation) are discussed. In the fact that many residual blocks become all zero blocks after DCT andquantization in very low bit rate videocoding, a motion search algorithm using zero block detection technology, is proposed in this paper. Good effect have been gained by optimizing the H.263 core algorithm modules based on the configuration of DSP and implementation of code .